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  rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective companies. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ? 2003 analog devices, inc. all rights reserved. precision low noise cmos rail-to-rail input/output operational amplifiers ad8605/ad8606/ad8608 * * protected by u.s.patent no. 5,969,657; other patents pending. functional block diagrams features low offset voltage: 65  v max low input bias currents: 1 pa max low noise: 8 nv/ hz wide bandwidth: 10 mhz high open-loop gain: 120 db unity gain stable single-supply operation: 2.7 v to 5.5 v microcsp tm applications photodiode amplification battery-powered instrumentation multipole filters sensors barcode scanners audio general description the ad8605, ad8606, and ad8608 are single, dual, and quad rail-to-rail input and output, single-supply amplifiers that feature very low offset voltage, low input voltage and current noise, and wide signal bandwidth. they use analog devices patented digitrim ? trimming technique, which achieves superior precision without laser trimming. the combination of low offsets, low noise, very low input bias currents, and high speed makes these amplifiers useful in a wide variety of applications. filters, integrators, photodiode amplifiers, and high impedance sensors all benefit from the combination of performance features. audio and other ac applications benefit from the wide bandwidth and low distortion. applications for these amplifiers include optical control loops, portable and loop-powered instrumentation, and audio amplification for portable devices. the ad8605, ad8606, and ad8608 are specified over the extended industrial ( C 40 c to +125 c) temperature range. the ad8605 single is available in the 5-lead sot-23 and 5-bump microcsp packages. the 5-bump microcsp offers the smallest available footprint for any surface-mount operational amplifier. the ad8606 dual is available in an 8-lead msop package and a narrow soi c surface-mount package. the ad8608 quad is available in a 14-lead tssop and a narrow 14-lead soic package. m icrocsp, sot, msop, and tssop versions are available in tape and reel only. 14-lead tssop (ru suffix) out a ?n a +in a v+ +in b ?n b out b ?n d +in d v out d ?n c out c +in c 14 8 1 7 ad8608 14-lead soic (r suffix) ?n a +in a v+ +in b ?n b out b out d ?n d +in d v +in c ?n c out c out a ad8608 1 2 3 4 5 6 7 14 13 12 11 10 9 8 5-bump microcsp (cb suffix)  in +in v+ out v ad8605 only top view ( bumpside down) 1 2 3 5 4 5-lead sot-23 (rt suffix) 1 2 3 5 4 ?n +in v+ out ad8605 v 8-lead msop (rm suffix) ?n a +in a v out b ?n b +in b v+ 1 45 8 ad8606 out a 8-lead soic (r suffix) 1 2 3 4 8 7 6 5 ad8608 ?n a v +in a out b ?n b v+ +in b out a
rev. c ? ad8605/ad8606/ad8608?pecifications parameter symbol conditions min typ max unit input characteristics offset voltage v os ad8605/ad8606 v s = 3.5 v, v cm = 3 v 20 65 v ad8608 v s = 3.5 v, v cm = 2.7 v 20 75 v v s = 5 v, v cm = 0 v to 5 v 80 300 v C 40 c < t a < +125 c 750 v input bias current i b 0.2 1 pa ad8605/ad8606 C 40 c < t a < +85 c50pa ad8605/ad8606 C 40 c < t a < +125 c 250 pa ad8608 C 40 c < t a < +85 c 100 pa ad8608 C 40 c < t a < +125 c 300 pa input offset current i os 0.1 0.5 pa C 40 c < t a < +85 c20pa C 40 c < t a < +125 c75pa input voltage range 0 5 v common-mode rejection ratio cmrr v cm = 0 v to 5 v 85 100 db C 40 c < t a < +125 c7590 db large signal voltage gain a vo v o = 0.5 v to 4.5 v 300 1,000 v/mv r l = 2 k ? , v cm = 0 v offset voltage drift ad8605/ad8606 ? v os / ? t1 4.5 v/ c ad8608 ? v os / ? t 1.5 6.0 v/ c input capacitance common-mode input capacitance 8.8 pf differential input capacitance 2.59 pf output characteristics output voltage high v oh i l = 1 ma 4.96 4.98 v i l = 10 ma 4.7 4.79 v C 40 c < t a < +125 c 4.6 v output voltage low v ol i l = 1 ma 20 40 mv i l = 10 ma 170 210 mv C 40 c < t a < +125 c 290 mv output current i out 80 ma closed-loop output impedance z out f = 1 mhz, a v = 1 10 ? power supply power supply rejection ratio psrr ad8605/ad8606 v s = 2.7 v to 5.5 v 80 95 db ad8608 v s = 2.7 v to 5.5 v 77 92 db C 40 c < t a < +125 c7090 db supply current/amplifier i sy v o = 0 v 1 1.2 ma C 40 c < t a < +125 c 1.4 ma dynamic performance slew rate sr r l = 2 k ? 5v/ s settling time t s to 0.01%, 0 v to 2 v step < 1 s full power bandwidth bw p < 1% distortion 360 khz gain bandwidth product gbp 10 mhz phase margin  o 65 degrees noise performance peak-to-peak noise e n p-p f = 0.1 hz to 10 hz 2.3 3.5 v p-p voltage noise density e n f = 1 khz 8 12 nv/ hz voltage noise density e n f = 10 khz 6.5 nv/ hz current noise density i n f = 1 khz 0.01 pa/ hz electrical characteristics (@ v s = 5 v, v cm = v s /2, t a = 25  c, unless otherwise noted.)
rev. c ad8605/ad8606/ad8608 ? electrical characteristics (@ v s = 2.7 v, v cm = v s /2, t a = 25  c, unless otherwise noted.) parameter symbol conditions min typ max unit input characteristics offset voltage v os ad8605/ad8606 v s = 3.5 v, v cm = 3 v 20 65 v ad8608 v s = 3.5 v, v cm = 2.7 v 20 75 v v s = 2.7 v, v cm = 0 v to 2.7 v 80 300 v C 40 c < t a < +125 c 750 v input bias current i b 0.2 1 pa ad8605/ad8606 C 40 c < t a < +85 c50pa ad8605/ad8606 C 40 c < t a < +125 c 250 pa ad8608 C 40 c < t a < +85 c 100 pa ad8608 C 40 c < t a < +125 c 300 pa input offset current i os 0.1 0.5 pa C 40 c < t a < +85 c20pa C 40 c < t a < +125 c75pa input voltage range 0 2.7 v common-mode rejection ratio cmrr v cm = 0 v to 2.7 v 80 95 db C 40 c < t a < +125 c7085 db large signal voltage gain a vo r l = 2 k ? , v o = 0.5 v to 2.2 v 110 350 v/mv offset voltage drift ad8605/ad8606 ? v os / ? t1 4.5 v/ c ad8608 ? v os / ? t 1.5 6.0 v/ c input capacitance common-mode input capacitance 8.8 pf differential input capacitance 2.59 pf output characteristics output voltage high v oh i l = 1 ma 2.6 2.66 v C 40 c < t a < +125 c 2.6 v output voltage low v ol i l = 1 ma 25 40 mv C 40 c < t a < +125 c50mv output current i out 30 ma closed-loop output impedance z out f = 1 mhz, a v = 1 12 ? power supply power supply rejection ratio psrr ad8605/ad8606 v s = 2.7 v to 5.5 v 80 95 db ad8608 v s = 2.7 v to 5.5 v 77 92 db C 40 c < t a < +125 c7090 db supply current/amplifier i sy v o = 0 v 1.15 1.4 ma C 40 c < t a < +125 c 1.5 ma dynamic performance slew rate sr r l = 2 k ? 5v/ s settling time t s to 0.01%, 0 v to 1 v step < 0.5 s gain bandwidth product gbp 9 mhz phase margin  o 50 degrees noise performance peak-to-peak noise e n p-p f = 0.1 hz to 10 hz 2.3 3.5 v p-p voltage noise density e n f = 1 khz 8 12 nv/ hz voltage noise density e n f = 10 khz 6.5 nv/ hz current noise density i n f = 1 khz 0.01 pa/ hz
rev. c ? ad8605/ad8606/ad8608 caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad8605/ad8606/ad8608 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. absolute maximum ratings * supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd to v s differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 6 v output short-circuit duration to gnd . . . . . . . . . . . . . . . . . . . . . observe derating curves storage temperature range all packages . . . . . . . . . . . . . . . . . . . . . . . . ?5 c to +150 c operating temperature range ad8605/ad8606/ad8608 . . . . . . . . . . . . ?0 c to +125 c junction temperature range all packages . . . . . . . . . . . . . . . . . . . . . . . . ?5 c to +150 c lead temperature range (soldering, 60 sec) . . . . . . . . 300 c * stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating condi- tions for extended periods may affect device reliability. package type  ja *  jc unit 5-bump microcsp (cb) 220 220 c/w 5-lead sot-23 (rt) 230 92 c/w 8-lead msop (rm) 210 45 c/w 8-lead soic (r) 158 43 c/w 14-lead soic (r) 120 36 c/w 14-lead tssop (ru) 180 35 c/w * ja is specified for worst-case conditions, i.e., ja is specified for device in socket for pdip packages; ja is specified for device soldered onto a circuit board for surface-mount packages. ordering guide temperature package package model range description option branding AD8605ACB-R2 * ?0 c to +125 c 5-bump microcsp cb-5 b3a ad8605acb-reel * ?0 c to +125 c 5-bump microcsp cb-5 b3a ad8605acb-reel7 * ?0 c to +125 c 5-bump microcsp cb-5 b3a ad8605art-r2 ?0 c to +125 c 5-lead sot-23 rt-5 b3a ad8605art-reel ?0 c to +125 c 5-lead sot-23 rt-5 b3a ad8605art-reel7 ?0 c to +125 c 5-lead sot-23 rt-5 b3a ad8606arm-r2 ?0 c to +125 c 8-lead msop rm-8 b6a ad8606arm-reel ?0 c to +125 c 8-lead msop rm-8 b6a ad8606ar 40 c to +125 c 8-lead soic r-8 ad8606ar-reel 40 c to +125 c 8-lead soic r-8 ad8606ar-reel7 40 c to +125 c 8-lead soic r-8 ad8608ar 40 c to +125 c 14-lead soic r-14 ad8608ar-reel 40 c to +125 c 14-lead soic r-14 ad8608ar-reel7 40 c to +125 c 14-lead soic r-14 ad8608aru 40 c to +125 c 14-lead tssop ru-14 ad8608aru-reel ?0 c to +125 c 14-lead tssop ru-14 * consult factory for availability.
rev. c t ypical performance characteristics?d8605/ad8606/ad8608 ? 4500 4000 0 number of amplifiers 2000 1500 1000 500 3000 2500 3500 offset voltage (  v) 300 ?00 ?00 0 100 200 ?00 v s = 5v t a = 25  c v cm = 0v to 5v tpc 1. input offset voltage distribution tcvos (  v/  c) 12 0 04.8 0.4 number of amplifiers 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 16 8 4 24 20 4.4 v s = 5v t a =  40  c to +125  c v cm = 2.5v tpc 2. ad8608 input offset voltage drift distribution tcvos (  v/  c) 20 10 0 02.6 0.2 number of amplifiers 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 14 6 2 2.2 v s = 5v t a =  40  c to +125  c v cm = 2.5v 2.4 12 16 8 4 18 tpc 3. ad8605/ad8606 input offset voltage drift distribution common-mode voltage ( v) 300 200 ?00 input offset voltage (  v) 100 0 ?00 ?00 v s = 5v t a = 25  c tpc 4. input offset voltage vs. common-mode voltage (200 units, 5 wafer lots, including process skews) temperature (  c) 360 160 0 0 125 25 input bias current (pa) 50 75 100 240 80 v s = 2.5v 200 280 120 40 320 ad8605/ad8606 ad8608 tpc 5. input bias current vs. temperature load current (ma) 1k 10 0.1 0.001 10 0.01 v sy ? out (mv) 0.1 1 1 100 source sink v s = 5v t a = 25  c tpc 6. output voltage to supply rail vs. load current
rev. c ? ad8605/ad8606/ad8608 temperature (  c) 5.000 4.950 4.700  40 125  25 output voltage (v)  10 5203 550658095110 4.850 4.750 v s = 5v 4.900 4.800 v oh @ 1ma load v oh @ 10ma load tpc 7. output voltage swing vs. temperature temperature (  c) 0.250 0  40 125  25 output voltage (v)  10 5203 550658095110 0.150 0.050 v s = 5v 0.200 0.100 v ol @ 10ma load v ol @ 1ma load tpc 8. output voltage swing vs. temperature gain (db) 100 80 ?00 60 40 20 0 ?0 ?0 ?0 ?0 225 180 ?25 135 90 45 0 ?5 ?0 ?35 ?80 phase (degrees) v s = 2.5v r l = 2k  c l = 20pf  m = 64  frequency (hz) 10k 100m 100k 1m 10m tpc 9. open-loop gain and phase vs. frequency frequency (hz) 6 5 0 1k 10m 10k output swing (v p-p) 100k 1m 4 3 1 2 v s = 5v v in = 4.9v p-p t a = 25  c r l = 2k  a v = 1 tpc 10. closed-loop output voltage swing frequency (hz) 100 90 0 1k 100m 10k output impedance (  ) 100k 1m 10m 80 70 20 60 50 30 v s = 2.5v 10 40 a v = 1 a v = 10 a v = 100 tpc 11. output impedance vs. frequency frequency (hz) 10k cmrr (db) 100k 1m 20 120 1k 10m 90 v s = 2.5v 80 70 60 50 40 30 110 100 tpc 12. common-mode rejection ratio vs. frequency
rev. c ad8605/ad8606/ad8608 ? frequency (hz) 140 80 ?0 1k 10m 10k psrr (db) 100k 1m 40 0 ?0 v s = 5v 100 120 60 20 ?0 tpc 13. psrr vs. frequency capacitance (p f ) 45 40 0 10 1k 100 small signal overshoot (%) 35 30 10 25 20 15 5 +os ?s v s = 5v r l = t a = 25  c a v = 1 tpc 14. small signal overshoot vs. load capacitance temperature (  c) 2.0 ?.5  40 125  25 supply current/amplifier (ma)  10 5203 550658095110 1.0 1.5 0.5 v s = 2.7v ?.0 ?.5 0 v s = 5v tpc 15. supply current vs. temperature supply voltage (v) 1.0 0.4 0 05.0 0.5 supply current/amplifier (ma) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0.9 0.5 0.3 0.1 0.7 0.6 0.2 0.8 tpc 16. supply current vs. supply voltage time (1s/div) 0 00 0 vo ltag e noise (1  v /div) 00000000 v s = 5v tpc 17. 0.1 hz to 10 hz input voltage noise time (200ns/div) 0 0 0 00 0 vo lta ge (50mv/div) 00000000 0 0 0 0 0 0 v s = 2.5v r l = 10k  c l = 200pf a v = 1 tpc 18. small signal transient response
rev. c ? ad8605/ad8606/ad8608 time (400ns/div) 0 0 0 00 0 vo lta ge (1v/div) 00000000 0 0 0 0 0 0 v s = 2.5v r l = 10k  c l = 200pf a v = 1 tpc 19. large signal transient response time (400ns/div) 0 0 0 00 0 vo ltag e v 00000000 0 0 0 0 0 0 v s = 2.5v r l = 10k  a v = 100 v in = 50mv +2.5v ?0mv 0v 0v tpc 20. negative overload recovery time (1  s/div) 0 0 0 00 0 vo ltag e v 00000000 0 0 0 0 0 0 v s = 2.5v r l = 10k  a v = 100 v in = 50mv ?.5v + 50mv 0v 0v tpc 21. positive overload recovery frequency (khz) 36 20 4 01.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 32 28 12 8 24 16 v s = 2.5v vo ltag e noise density (nv/ hz) tpc 22. voltage noise density frequency (khz) 0 010 123456789 6.7 v s = 2.5v vo ltag e noise density (nv/ hz) 20.1 13.4 26.8 40.2 33.5 53.6 46.9 tpc 23. voltage noise density frequency (hz) 0 0 100 10 20 30 40 50 60 70 80 90 0 0 v s = 2.5v 14.9 29.8 44.7 59.6 vo ltag e noise density (nv/ hz) 74.5 89.4 104.3 119.2 tpc 24. voltage noise density
rev. c ad8605/ad8606/ad8608 ? 1800 1600 0 number of amplifiers 800 600 400 200 1200 1000 1400 offset voltage (  v) 300 ?00 ?00 0 100 200 ?00 v s = 2.7v t a = 25  c v cm = 0v to 2.7v tpc 25. input offset voltage distribution common-mode voltage (v) 300 200 ?00 0 0 2.7 input offset voltage (  v) 100 0 ?00 ?00 v s = 2.7v t a = 25  c 1.8 0.9 0 tpc 26. input offset voltage vs. common-mode voltage (200 units, 5 wafer lots, including process skews) load current (ma) 1k 10 0.1 0.001 10 0.01 output voltage (mv) 0.1 1 1 100 source sink v s = 2.7v t a = 25  c tpc 27. output voltage to supply rail vs. load current temperature (  c) 2.680 2.675 2.650  40 125  25 output voltage (v)  10 5203 550658095110 2.665 2.655 v s = 2.7v 2.670 2.660 v oh @ 1ma load tpc 28. output voltage swing vs. temperature temperature (  c) 0.045 0.025 0  40 125  25 output voltage (v)  10 5203 550658095110 0.035 0.015 0.005 v s = 2.7v 0.030 0.040 0.020 0.010 v ol @ 1ma load tpc 29. output voltage swing vs. temperature frequency (hz) 10k 100m 100k gain (db) 100 80 ?00 60 40 20 0 ?0 ?0 ?0 ?0 225 180 ?25 135 90 45 0 ?5 ?0 ?35 ?80 phase (degrees) v s = 1.35v r l = 2k  c l = 20pf  m = 52.5  1m 10m tpc 30. open-loop gain and phase vs. frequency
rev. c ?0 ad8605/ad8606/ad8608 frequency (hz) 3.0 2.5 0 1k 10m 10k output swing (v p-p) 100k 1m 2.0 1.5 0.5 1.0 v s = 2.7v v in = 2.6v p-p t a = 25  c r l = 2k  a v = 1 tpc 31. closed-loop output voltage swing vs. frequency frequency (hz) 100 90 0 1k 100m 10k output impedance (  ) 100k 1m 10m 80 70 20 60 50 30 v s = 1.35v 10 40 a v = 1 a v = 10 a v = 100 tpc 32. output impedance vs. frequency capacitance (pf) 60 50 0 10 1k 100 small signal overshoot (%) 30 20 10 40 v s = 2.7v t a = 25  c a v = 1 +os ?s tpc 33. small signal overshoot vs. load capacitance time (1s/div) 0 00 0 vo ltag e noise (1  v /div) 00000000 v s = 2.7v tpc 34. 0.1 hz to 10 hz input voltage noise time (200ns/div) 0 0 0 00 0 vo lta ge (50mv/div) 00000000 0 0 0 0 0 0 v s = 1.35v r l = 10k  c l = 200pf a v = 1 tpc 35. small signal transient response time (400ns/div) 0 0 0 00 0 vo lta ge (1v/div) 00000000 0 0 0 0 0 0 v s = 1.35v r l = 10k  c l = 200pf a v = 1 tpc 36. large signal transient response
rev. c ad8605/ad8606/ad8608 ?1 output phase reversal phase reversal is defined as a change in polarity at the output of the amplifier when a voltage that exceeds the maximum input common-mode voltage drives the input. phase reversal can cause permanent damage to the amplifier; it may also cause system lockups in feedback loops. the ad8605 does not exhibit phase reversal even for inputs exceeding the supply voltage by more than 2 v. time (4  s/div) 0 0 0 00 0 vo lta ge (2v/div) 00000000 0 0 0 0 0 0 v s = 2.5v v in = 6v p-p a v = 1 r l = 10k  v in v out figure 1. no phase reversal maximum power dissipation power dissipated in an ic will cause the die temperature to increase. this can affect the behavior of the ic and the applica- tion circuit performance. the absolute maximum junction temperature of the ad8605/ ad8606/ad8608 is 150 c. exceeding this temperature could cause damage or destruction of the device. the maximum power dissipation of the amplifier is calculated according to the following formula: p tt diss a a = ? () j j where: t j = junction temperature t a = ambient temperature  j a = junction-to-ambient thermal resistance figure 2 compares the maximum power dissipation with tempera- ture for the various packages available for the ad8605 family. temperature (  c) 1.0 0.8 0 0 100 20 power dissipation (w) 40 60 80 0.6 0.4 0.2 soic-14 2.0 1.8 1.6 1.4 1.2 soic-8 sot-23 tssop msop figure 2. maximum power dissipation vs. temperature input overvoltage protection the ad8605 has internal protective circuitry. however, if the voltage applied at either input exceeds the supplies by more than 2.5 v, external resistors should be placed in series with the inputs. the resistor values can be determined according to the formula vv r ma in s s ? () + () 200 5 ? the remarkable low input offset current of the ad8605 (<1 pa) allows the use of larger value resistors. with a 10 k ? resistor at the input, the output voltage will have less than 10 nv of error voltage. a 10 k ? resistor has less than 13 nv/ hz of thermal noise at room temperature. thd + noise total harmonic distortion is the ratio of the input signal in v rms to the total harmonics in v rms throughout the spectrum. har- monic distortion adds errors to precision measurements and adds unpleasant sonic artifacts to audio systems. the ad8605 has a low total harmonic distortion. figure 3 shows that the ad8605 has less than 0.005% or C 86 db of thd + n over the entire audio frequency range. the ad8605 is configured in positive unity gain, which is the worst case, and with a load of 10 k ? . frequency (hz) 0.1 0.01 0.0001 20 20k 100 thd + n (%) 1k 0.001 10k v sy = 2.5v a v = 1 bw = 22khz figure 3. thd + n total noise including source resistors the low input current noise and input bias current of the ad8605 make it the ideal amplifier for circuits with substantial input source resistance such as photodiodes. input offset voltage increases by less than 0.5 nv per 1 k ? of source resistance at room temperature and increases to 10 nv at 85 c. the total noise density of the circuit is eeir ktr n total n n s s , =+ () + 2 2 4 where: e n is the input voltage noise density of the ad8605 i n is the input current noise density of the ad8605 r s is the source resistance at the noninverting terminal k is boltzmann s constant (1.38  10 C 23 j/k) t is the ambient temperature in kelvin (t = 273 + c) for example, with r s = 10 k ? , the total voltage noise density is roughly 15 nv/ hz . for r s < 3.9 k ? , e n dominates and e n, total e n .
rev. c ?2 ad8605/ad8606/ad8608 the current noise of the ad8605 is so low that its total density does not become a significant term unless r s is greater than 6 m ? . the total equivalent rms noise over a specific bandwidth is expressed as ee bw nn total = () , where bw is the bandwidth in hertz. note that the analysis above is valid for frequencies greater than 100 hz and assumes relatively flat noise, above 10 khz. for lower frequencies, flicker noise (1/f) must be considered. channel separation channel separation, or inverse crosstalk, is a measure of the signal feed from one amplifier (channel) to the other on the same ic. the ad8606 has a channel separation of greater than C 160 db up to frequencies of 1 mhz, allowing the two amplifiers to amplify ac signals independently in most applications. channel separation (db) frequency (hz) 10m 1m 100k 10k 1k 100 100m ?0 0 ?0 ?0 ?0 ?00 ?20 ?40 ?60 ?80 figure 4. channel separation vs. frequency capacitive load drive the ad8605 is capable of driving large capacitive loads without oscillation. figure 5 shows the output of the ad8606 in response to a 200 mv input signal. in this case, the amplifier was configured in positive unity gain, worst case for stability, while driving a 1,000 pf load at its output. driving larger capacitive loads in unity gain may require the use of additional circuitry. a snubber network, shown in figure 7, helps reduce the signal overshoot to a minimum and maintain stability. although this circuit does not recover the loss of bandwidth induced by large capacitive loads, it greatly reduces the overshoot and ringing. this method does not reduce the maximum output swing of the amplifier. figure 6 shows a scope photograph of the output at the snubber circuit. the overshoot is reduced from over 70% to less than 5%, and the ringing is eliminated by the snubber. optimum values for r s and c s are determined experimentally. table i summarizes a few starting values. an alternate technique is to insert a series resistor inside the feedback loop at the output of the amplifier. typically, the value of this resistor is approximately 100 ? . this method also reduces overshoot and ringing but causes a reduction in the maximum output swing. time (10  s/div) 0 0 0 00 0 vo lta ge (100mv/div) 00000000 0 0 0 0 0 0 v s = 2.5v a v = 1 r l = 10k  c l = 1,000pf figure 5. capacitive load drive without snubber time (10  s/div) 0 0 0 00 0 vo lta ge (100mv/div) 00000000 0 0 0 0 0 0 v s = 2.5v a v = 1 r l = 10k  r s = 90  c l = 1,000pf c s = 700pf figure 6. capacitive load drive with snubber r s c s r l c l v v+ 4 2 3 8 1 ad8605 v in 200mv figure 7. snubber network configuration table i. optimum values for capacitive loads c l (pf) r s (  )c s (pf) 500 100 1,000 1,000 70 1,000 2,000 60 800 light sensitivity the ad8605acb (microcsp package option) is essentially a silicon die with additional post fabrication dielectric and inter- metallic processing designed to contact solder bumps on the active side of the chip. with this package type, the die is e xposed to ambient light and is subject to photoelectric effects. light sensitivity analysis of the ad8605acb mounted on standard pcb material reveals that only the input bias current (i b ) parameter
rev. c ad8605/ad8606/ad8608 ?3 is impacted when the package is illuminated directly by high intensity light. no degradation in electrical performance is observed due to illumination by low intensity (0.1 mw/cm 2 ) ambient light. figure 8 shows that i b increases with increasing wavelength and intensity of incident light; i b can reach levels as high as 4500 pa at a light intensity of 3 mw/cm 2 and a wave- length of 850 nm. the light intensities shown in figure 8 will not be normal for most applications, i.e., even though direct sunlight can have intensities of 50 mw/cm 2 , office ambient light can be as low as 0.1 mw/cm 2 . when the microcsp package is assembled on the board with the bump-side of the die facing the pcb, reflected light from the pcb surface is incident on active silicon circuit areas and results in the increased i b . no performance degradation will occur due to illumination of the backside (substrate) of the ad8605acb. the ad8605acb is particularly sensitive to incident light with wavelengths in the near infrared range (nir, 700 nm to 1000 nm). p hotons in this waveband have a longer wavelength and lower energy than photons in the visible (400 nm to 700 nm) and near ultraviolet (nuv, 200 nm to 400 nm) bands; there fore, they can penetrate more deeply into the active silicon. incident light with wavelengths greater than 1100 nm has no photoelec tric effect on the ad8605acb since silicon is transparent to wave- lengths in this range. the spectral content of conventional light sorces varies: sunlight has a broad spectral range, with peak intensity in the visible band that falls off in the nuv and nir bands; flourescent lamps have significant peaks in the visible but not in the nuv or nir bands. efforts have been made at a product level to reduce the effect of ambient light; the under bump metal (ubm) has been designed to shield the sensitive circuit areas on the active side (bump-side) of the die. however, if an application encounters any light sensitivity with the ad8605acb, shielding the bump side of the microcsp package with opaque material should eliminate this effect. shielding can be accomplished using materials such as silica filled liquid epoxies that are used in flip chip underfill techniques. wa velength (nm) 3500 0 350 input bias current (pa) 2500 3000 2000 500 1000 1500 450 550 650 750 850 1mw/cm 2 2mw/cm 2 3mw/cm 2 4000 4500 5000 figure 8. ad8605acb input bias current response to direct illumination of varying intensity and wavelength microcsp assembly considerations for detailed information on microcsp pcb assembly and reli ability, refer to adi application note an-617 on the adi website www.analog.com. i-v conversion applications photodiode preamplifier applications the low offset voltage and input current of the ad8605 make it an excellent choice for photodiode applications. in addition, the low voltage and current noise make the amplifier ideal for appli- cation circuits with high sensitivity. r d i d c d 50pf ad8605 v out photodiode +v os r f 10m  c f 10pf figure 9. equivalent circuit for photodiode preamp the input bias current of the amplifier contributes an error term that is proportional to the value of r f . the offset voltage causes a dark current induced by the shunt resistance of the diode, r d . these error terms are combined at the output of the amplifier and the error voltage is written: ev r r ri oos f d fb =+ ? ? ? ? ? ? + 1 typically, r f is much smaller than r d , thus r f / r d can be ignored. at room temperature, the ad8605 has an input bias current of 0.2 pa and an offset voltage of 100 v. typical values of r d are in the range of 1 g ? . for the circuit shown in figure 9, the output error voltage is approximately 100 v at room temperature, increasing to about 1 mv at 85 c. the maximum achievable signal bandwidth is f f rc max t ft = 2 where f t is the unity gain frequency of the amplifier. audio and pda applications the ad8605 s low distortion and wide dynamic range make it a great choice for audio and pda applications, including micro- phone amplification and line output buffering. figure 10 shows a typical application circuit for headphone/line out amplification. r1 and r2 are used to bias the input voltage at half the supply. this maximizes the signal bandwidth range. c1 and c2 are used to ac couple the input signal. c1 and r2 form a high-pass filter whose corner frequency is 1/2 r1c1. the high output current of the ad8605 allows it to drive heavy resistive loads.
rev. c ?4 ad8605/ad8606/ad8608 the circuit of figure 10 was tested to drive a 16 w headphone. the thd + n is maintained at approximately C 60 db throughout the audio range. 5v 4 2 3 8 1 1/2 ad8606 r1 10k  r2 10k  c3 100  f r3 1k  r4 20  c1 1  f v1 500mv headphones 5v 4 6 5 8 7 1/2 ad8606 c4 100  f r5 1k  r6 20  c2 1  f v2 500mv figure 10. single-supply headphone/speaker amplifier instrumentation amplifiers the low offset voltage and low noise of the ad8605 make it a great amplifier for instrumentation applications. difference amplifiers are widely used in high accuracy circuits to improve the common-mode rejection ratio. figure 10 shows a simple difference amplifier. the cmrr of the circuit is plotted versus frequency. figure 11 shows the common- mode rejection for a unity gain configuration and for a gain of 10. making (r4/r3) = (r2/r1) and choosing 0.01% tolerance yields a cmrr of 74 db and minimizes the gain error at the output. frequency (hz) 120 100 0 100 10m 1k cmrr (db) 10k 100k 1m 60 40 20 80 v sy = ?.5v a v = 1 a v = 10 figure 11. difference amplifier cmrr vs. frequency d/a conversion the low input bias current and offset voltage of the ad8605 make it an excellent choice for buffering the output of a current output dac. figure 12 shows a typical implementation of the ad8605 at the output of a 12-bit dac. r2 ad8605 v os r f c f v ref r2 r2 rrr v v+ figure 12. simplified circuit of the dac8143 with ad8605 output buffer the dac8143 output current is converted to a voltage by the feedback resistor. the equivalent resistance at the output of the dac varies with the input code, as does the output capacitance. to optimize the performance of the dac, insert a capacitor in the feedback loop of the ad8605 to compensate the amplifier from the pole introduced by the output capacitance of the dac. typical values for c f are in the range of 10 pf to 30 pf; it can be adjusted for the best frequency response. the total error at the output of the op amp can be computed by the formula: ev r oos f =+ ? ? ? ? ? ? 1 req where req is the equivalent resistance seen at the output of the dac. as mentioned above, req is code dependant and varies with the input. a typical value for req is 15 k ? . choosing a feedback resistor of 10 k ? yields an error of less than 200 v. figure 13 shows the implementation of a dual-stage buffer at the output of a dac. the first stage is used as a buffer. capaci- tor c1, with req, creates a low-pass filter and thus provides phase lead to compensate for frequency response. the second stage of the ad8606 is used to provide voltage gain at the output of the buffer. grounding the positive input terminals in both stages reduces errors due to the common-mode output voltage. choosing r1, r2, and r3 to match within 0.01% yields a cmrr of 74 db and maintains minimum gain error in the circuit. r fb v dd db11 out1 1/2 ad8606 ad7545 1/2 ad8606 a gnd c1 33pf r1 10k  r4 5k  10% r2 20k  r cs r p v in 15v r3 20k  v out v ref figure 13. bipolar operation
rev. c ad8605/ad8606/ad8608 ?5 outline dimensions 5-lead small outline transistor package [sot-23] (rt-5) dimensions shown in millimeters pin 1 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 1 3 4 5 2 0.22 0.08 10  5  0  0.50 0.35 0.15 max seating plane 1.45 max 1.30 1.15 0.90 2.90 bsc 0.60 0.45 0.30 compliant to jedec standards mo-178aa 14-lead standard small outline package [soic] narrow body (r-14) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design coplanarity 0.10 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 8  0  0.50 (0.0197) 0.25 (0.0098)  45  1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) compliant to jedec standards ms-012ab 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters 0.80 0.60 0.40 8  0  85 4 1 4.90 bsc pin 1 0.65 bsc 3.00 bsc seating plane 0.15 0.00 0.38 0.22 1.10 max 3.00 bsc coplanarity 0.10 0.23 0.08 compliant to jedec standards mo-187aa 8-lead standard small outline package [soic] narrow body (r-8) dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099)  45  8  0  1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 85 4 1 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012aa 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc seating plane 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 8  0  0.75 0.60 0.45 compliant to jedec standards mo-153ab-1 coplanarity 0.10 5-bump 2  1  2 array microcsp [wlcsp] (cb-5) dimensions shown in millimeters seating plane 0.50 ref 0.87 0.37 0.36 0.35 0.17 0.14 0.12 0.21 0.50 0.20 0.50 0.23 0.18 0.14 bottom view 0.94 0.90 0.86 pin 1 identifier 1.33 1.29 1.25 top view ( bumpside down)
rev. c c02731??/03(c) ?6 ad8605/ad8606/ad8608 revision history location page 7/03 data sheet changed from rev. b to rev. c. changes to features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 change to general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 addition to functional block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 addition to absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 addition to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 change to equation in maximum power dissipation section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 added light sensitivity section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 added new figure 8 and renumbered subsequent figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 added new microcsp assembly considerations section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 changes to figure 9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 change to equation in photodiode preamplifier applications section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 changes to figure 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 change to equation in d/a conversion section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3/03 data sheet changed from rev. a to rev. b. edits to functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 edits to absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 edits to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 edits to figure 9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 11/02 data sheet changed from rev. c to rev. a. change to electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 edits to absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 updated ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 edit to tpc 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15


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